A Simple Process to Produce High Quality Silicon Surface Prior to Selective Epitaxial Growth
Published in IEEE Electron Device Letters
Back Gated Buried Oxide MOSFETs in a High Voltage Bipolar Technology for Bonded Oxide/SOI Interface Characterization
Published in IEEE Electron Device Letters
PLATOP-A Novel Planarized Trench Isolation and Field Oxide Formation Using Poly-Silicon
Published in IEEE Electron Device Letters
A Poly-Silicon Contacted Sub-Collector BJT for a 3-Dimensional BiCMOS Process
Published in IEEE Electron Device Letters
Degradation of Insulators in the Silicon Selective Epitaxial Growth Ambient
Published in IEEE Electron Device Letters
The degradation of various insulators in Silicon Selective Epitaxial Growth (SEG) ambient was studied. The insulators studied were thermal oxide, reoxidized nitride/oxide stack, poly-oxide, and nitrided oxide. Breakdown electric fields of MIS capacitors were measured and yields were calculated before and after the insulators were exposed to Silicon...
Precision Electrical Trimming of Poly-SiGe Resistors
...Published in IEEE Electron Device Letters
Elimination of the Sidewall Defects in Selective Epitaxial Growth (SEG) of Silicon for a Dielectric Isolation Technology...
Published in IEEE Electron Device Letters
